One of the key features of Cypress's NOR Flash memory product is the universal footprint which provides a single footprint across memories, product families, and process technologies providing a scalable solution for customers. HyperFlash continues this feature in a 24 ball BGA. What is being shown here is the pin out for 3 different products: the single Quad SPI, the dual quad SPI, and the HyperFlash. Starting off with the single Quad SPI, which can support up to 80 MBps throughput as well as 128 Mb to 1 Gb density ranges. What is being shown here highlighted in blue are the signals that are required for data transaction; there is a total of 6 on the single QUAD SPI. Moving to the dual QUAD SPI, this is effectively two SPI products in parallel. What that allows is to scale up to 160 MBps, with densities ranging from 256 Mb to 1 Gb. In addition, the same 6 blue signals for the single QUAD SPI are in the same place, and the grey colors are the additional 6 pins for the second SPI device. Now for HyperFlash memory. It can be seen that with only one additional pin, the RWDS is added in, which now allows scale up to 333 MBps with densities ranging from 126 Mb to 512 Mb. One thing to be pointed out here is that what is shown is highlighting the mandatory pins for data transaction. On the HyperFlash, some additional pins can be seen which are an interrupt pin, a reset pin, and a reset out pin. These pins are optional pins and are not mandatory for the data transactions. These pins are supported by some HyperBus chip sets, but not all chip sets will necessarily support these signals. It is not necessary for these signals to be connected in order to do the data transfer. In short, what this allows is a scalable pin out and common pin out across the different products and technologies, ranging from the single QUAD to a dual QUAD and the HyperFlash. Cypress views this as a better and faster solution.