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It is important to note that although reads are done at system clock frequency, register writes do not happen instantaneously. It takes two to three clock cycles for synchronization to happen before the data becomes valid. This can be checked by monitoring the status of write complete bit. It is also important to note that system reset is blocked when external pin wake or RTC are enabled. While using software requested hibernate entry, a valid wake source must be set, any low battery conditions must be cleared, and flash or EEPROM must not be busy.
PTM Published on: 2013-09-09
New Zealand